ASIC DFT DV Engineer || System Verilog, UVM || JTAG, MBIST || Exp : 8+ years

SeniorFull-time

The full description is on Cisco's site.

ASIC DFT DV Engineer || System Verilog, UVM || JTAG, MBIST || Exp : 8+ years at Cisco | CareerSweep