ASIC Engineering Digital Design Leader (Digital design, FSM, CPU sub-systems, complex SOCs | 12-16 Years | Pune/ Bangalore)
CiscoSeniorFull-time
- Posted
- 12 Oct 2026
- Location
- Pune, India · Bangalore, India
- Role
- Hardware / Embedded
- Experience
- 12+ years
- Degree
- Bachelor's
- Skills
- Machine LearningVerilogFPGA
- Salary
- Not listed in the job ad
The full description is on Cisco's site.