ASIC Design Verification Engineer | UVM | Exp 8+ Years
CiscoSeniorFull-time
- Posted
- 14 May 2026
- Location
- Bangalore, India
- Role
- Hardware / Embedded
- Experience
- 5+ years
- Degree
- Bachelor's
- Skills
- PythonVerilog
- Salary
- Not listed in the job ad
The full description is on Cisco's site.