Design Automation Engineer (TFM/EDA)
IntelEntry / JuniorFull-time
- Posted
- 15 Oct 2026
- Location
- US, California, Folsom · US, Oregon, Hillsboro · US, California, Santa Clara · US, Arizona, Phoenix
- Role
- QA / Test
- Experience
- 1+ years
- Degree
- Bachelor's
- Skills
- PythonLinuxVerilogVHDL
- Salary
- $100,550 – $194,270 / year, before tax
The full description is on Intel's site.