Working Student - RTL Design for SoC Fault Tolerance & Error Detection (f/m/div)
InfineonIntern / Trainee
- Posted
- 8 Oct 2026
- Location
- Munich, BY, DE
- Role
- Other
- Degree
- Bachelor's
- Skills
- PythonLinuxVerilogVHDLGit
- Salary
- Not listed in the job ad
The full description is on Infineon's site.