
STAGE – Ingénieur Mise en œuvre d’un GP-GPU RISC-V open-source sur FPGA (H/F) – 6 mois
ThalesIntern / TraineeFull-time
- Posted
- 25 Sept 2026
- Location
- Palaiseau, Essonne, 91767
- Role
- Hardware / Embedded
- Skills
- C++LinuxVerilogVHDLFPGA
- Salary
- Not listed in the job ad
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