Senior Staff Interface IP Verification Engineer (Pre-Silicon- PCIe/CXL/DDR/Ethernet)
SynopsysStaff / Principal
- Posted
- 1 Oct 2026
- Location
- Munich, Germany
- Role
- Hardware / Embedded
- Experience
- 8+ years
- Degree
- Bachelor's
- Skills
- Verilog
- Salary
- Not listed in the job ad
The full description is on Synopsys's site.