ASIC Design / Verification, Manager-Sr Manager
SynopsysLead / Manager
- Posted
- 16 Sept 2026
- Location
- Hsinchu, Taiwan
- Role
- Hardware / Embedded
- Experience
- 15+ years
- Degree
- Bachelor's
- Skills
- PythonVerilog
- Salary
- Not listed in the job ad
The full description is on Synopsys's site.