ASIC Logic Design Verification Principal Engineer
SynopsysStaff / Principal
- Posted
- 7 Sept 2026
- Location
- Dublin, Ireland
- Role
- Hardware / Embedded
- Experience
- 12+ years
- Degree
- Bachelor's
- Skills
- PythonVerilog
- Salary
- Not listed in the job ad
The full description is on Synopsys's site.