
Design Verification Engineer - DDR Memory Subsystem
MicrosoftEntry / JuniorHybrid · 3 days/wkFull-time
- Posted
- 30 Sept 2026
- Location
- Raleigh, NC, US · Austin, TX, US · Hillsboro, OR, US · Mountain View, CA, US
- Role
- Hardware / Embedded
- Experience
- 1+ years
- Degree
- Bachelor's
- Skills
- PythonAzureLLMVerilog
- Salary
- $102,100 – $202,200 / year, before tax
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