ASIC Design Engineer – Clocks IP
NVIDIAMidFull-time
- Posted
- 19 Oct 2026
- Location
- US, CA, Santa Clara · US, TX, Austin
- Role
- Hardware / Embedded
- Experience
- 2+ years
- Degree
- Bachelor's
- Skills
- PythonVerilog
- Salary
- $116,000 – $189,750 / year, before tax
The full description is on NVIDIA's site.