ASIC Design Verification Engineer, Sr. Staff-18856
SynopsysStaff / Principal
- Posted
- 18 Sept 2026
- Location
- Nepean, Canada
- Role
- Hardware / Embedded
- Experience
- 6+ years
- Skills
- PythonVerilog
- Salary
- Not listed in the job ad
The full description is on Synopsys's site.