
Microarchitecture and Design Engineer - AI SoC
IntelEntry / JuniorFull-time
- Posted
- 6 Nov 2026
- Location
- US, California, Santa Clara · US, California, Folsom
- Role
- Data / AI / ML
- Experience
- 1+ years
- Degree
- Bachelor's
- Skills
- VerilogVHDL
- Salary
- $105,650 – $172,860 / year, before tax
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